1 C2M1000170D silicon carbide power mosfet z -fe t tm mosfet n-channel enhancement mode features ? high speed switching with low capacitances ? high blocking voltage with low r ds(on) ? easy to parallel and simple to drive ? resistant to latch-up ? halogen free, rohs compliant benefts ? higher system effciency ? increased system switching frequency ? reduced cooling requirements ? increased system reliability applications ? auxiliary power supplies ? switch mode power supplies package to-247-3 part number package C2M1000170D to-247-3 v ds 1700 v i d @ 25?c 4.9 a r ds(on) 1.0 ? maximum ratings (t c = 25 ?c unless otherwise specifed) symbol parameter value unit test conditions note i ds (dc) continuous drain current 4.9 a v gs = 20 v, t c = 25 c fig. 14 3.0 v gs = 20 v, t c = 100 c i ds (pulse) pulsed drain current 5.0 a pulse width t p limited by t jmax t c = 25 c fig. 16 v gs gate source voltage -10/+25 v p tot power dissipation 69 w t c =25 c, t j = 150 c fig. 13 t j , t stg operating junction and storage temperature -55 to +150 ?c t l solder temperature 260 ?c 1.6 mm (0.063) from case for 10s m d mounting torque 1 8.8 nm lbf-in m3 or 6-32 screw C2M1000170D rev. a
2 electrical characteristics (t c = 25?c unless otherwise specifed) symbol parameter min. typ. max. unit test conditions note v (br)dss drain-source breakdown voltage 1700 v v gs = 0 v, i d = 100 a v gs(th) gate threshold voltage 2.0 2.4 v v ds = v gs , i d = 100 a fig. 9 1.4 1.8 v v ds = v gs, i d = 100 a t j = 150 c i dss zero gate voltage drain current 30 na v ds = 1700 v, v gs = 0 v 100 v ds = 1700 v, v gs = 0 v t j =150 c i gss gate-source leakage current 20 na v gs = 20 v, v ds = 0 v r ds(on) drain-source on-state resistance 0.95 1.1 ? v gs = 20 v, i d = 2 a fig. 6, 7, 8 2.1 2.9 v gs = 20 v, i d = 2 a, t j = 150 c g fs transconductance 0.9 s v ds = 20 v, i ds = 2 a fig. 5 0.8 v ds = 20 v, i ds = 2 a, t j = 150 c c iss input capacitance 191 pf v gs = 0 v v ds = 1000 v f = 1 mhz v ac = 25 mv fig. 12 c oss output capacitance 12 c rss reverse transfer capacitance 1.3 e oss c oss stored energy 6.0 j fig 10 t d(on)v turn-on delay time 9 ns v dd = 1000 v, v gs = -5/20 v i d = 2 a r g(ext) = 0 , r l = 40 timing relative to v ds fig. 7 t rv rise time 46 t d(off)v turn-off delay time 15 t fv fall time 9 r g internal gate resistance 24.8 f = 1 mhz , v ac = 25 mv, esr of c iss built-in sic body diode characteristics thermal characteristics symbol parameter typ. max. unit test conditions note r jc thermal resistance from junction to case 1.7 1.8 c/w fig. 15 gate charge characteristics symbol parameter typ. max. unit test conditions note q gs gate to source charge 2.7 nc v ds = 1000 v, v gs = -5/20 v i d = 1 a per jedec24 pg 27 fig. 18 q gd gate to drain charge 5.4 q g gate charge total 13 C2M1000170D rev. a
3 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 2 4 6 8 10 drain - source current, i ds (a) drain - source voltage, v ds (v) parameters: t j = 150 c tp < 50 v gs = 20 v v gs = 18 v v gs = 12 v v gs = 16 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 1 2 3 4 5 6 7 drain - source current, i ds (a) drain - source voltage, v ds (v) parameters: t j = 100 c tp < 50 v gs = 20 v v gs = 18 v v gs = 12 v v gs = 16 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 1 2 3 4 5 drain - source current, i ds (a) drain - source voltage, v ds (v) parameters: t j = - 55 c tp < 50 v gs = 20 v v gs = 18 v v gs = 12 v v gs = 16 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 1 2 3 4 5 drain - source current, i ds (a) drain - source voltage, v ds (v) parameters: t j = 25 c tp < 50 v gs = 20 v v gs = 18 v v gs = 12 v v gs = 16 v figure 2. typical output characteristics t j = 25 c typical performance figure 5. typical transfer characteristics figure 1. typical output characteristics t j = -55 c 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0 2 4 6 8 10 12 14 drain - source current, i ds (a) gate - source voltage, v gs (v) parameters: t j = - 55 c tp < 50 t j = - 55 c t j = 150 c t j = 25 c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 - 55 - 35 - 15 5 25 45 65 85 105 125 145 normalized typical on resistance, r ds on (p.u.) junction temperature, t j ( c) conditions: i ds = 2 a v gs = 20 v t p < 50 s figure 3. typical output characteristics t j = 100 c figure 4. typical output characteristics t j = 150 c figure 6. normalized on-resistance vs. temperature C2M1000170D rev. a
4 typical performance 0 500 1,000 1,500 2,000 2,500 3,000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 typical on resistance, r ds on (mohms) drain - source current, i ds (a) conditions: v gs = 20 v t p < 50 s t j = 25 c t j = 150 c t j = - 55 c 0 500 1,000 1,500 2,000 2,500 3,000 12 13 14 15 16 17 18 19 20 typical on resistance, r ds on (mohms) gate - source voltge, v gs (v) conditions: i ds = 2 a t p < 50 s t j = - 55 c t j = 150 c t j = 25 c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 - 55 - 30 - 5 20 45 70 95 120 145 threshold voltage, v th (v) junction temperature, t j ( c) min conditions: v gs = v ds i ds = 1 ma typical 0 1 2 3 4 5 6 0 250 500 750 1000 stored energy, e oss (j) drain - source voltage, v ds (v) 1 10 100 0 50 100 150 200 250 300 capacitance (pf) drain - source voltage, v ds (v) conditions: f test = 1 mhz v ac = 25 mv t j = 25 c c oss c rss c iss 1 10 100 0 300 600 900 1200 1500 1800 capacitance (pf) drain - source voltage, v ds (v) conditions: f test = 1 mhz v ac = 25 mv t j = 25 c c oss c rss c iss figure 7. typical on-resistance vs. drain current figure 8. typical on-resistance vs. gate voltage figure 9. typical threshold voltage vs. temperature figure 10. typical transfer characteristics figure 11. typical capacitances vs drain voltage (0-300 v) figure 12. typical capacitances vs drain voltage (0-1200 v) C2M1000170D rev. a
5 0 10 20 30 40 50 60 0 5 10 15 20 25 time (ns) external gate resistor, r g ( ? ) t d(off)v t d(on)v t rv conditions: v gs = 0/20 v v dd = 1000 v r l = 160 ? i d = 2.0 a t j = 25 c typical performance figure 13. power dissipation derating curve 0 10 20 30 40 50 60 70 80 - 55 - 5 45 95 145 maximum dissipated power, p tot (w) case temperature, t c ( c) conditions: t j 150 c 0 1 2 3 4 5 6 - 55 - 5 45 95 145 drain - source continous current, i ds (dc) (a) case temperature, t c ( c) conditions: t j 150 c 0.001 0.01 0.1 1 1e - 6 10e - 6 100e - 6 1e - 3 10e - 3 100e - 3 1 junction - case thermal response, z th jc ( c/w) time 1 s 100 ms 100 s 10 ms 1 ms 10 s 1 s d = t p / t t p t d=0.2% single pulse d=90% d=70% d=30% d=10% d=5.0% d=1.0% d=0.5% d=2.0% 0.01 0.10 1.00 10.00 0.1 1 10 100 1000 drain - source current, i ds (a) drain - source voltage, v ds (v) 100 s 1 ms 1 s conditions: t c = 25 c d = 0, parameter: t p 100 ms limited by r ds on figure 14. continuous i ds current derating curve - 5 0 5 10 15 20 0 2 4 6 8 10 12 14 gate - source voltage, v gs (v) gate charge, q g (nc) conditions: i ds = 1 a i gs = 1 ma v ds = 1000 v t j = 25 c figure 18. typical gate charge figure 15. typical transient thermal impedance (junction - case) with duty cycle figure 16. safe operating area, t j = 25 c figure 17. resistive switching times vs. r g C2M1000170D rev. a
6 typical performance figure 24. clamped inductive switching waveform test circuit c = 42.3 f v = 800 v d.u.t. c2m0080120d c4d10120d 10a, 1200v sic schottky l = 856 h figure 25. switching test waveforms for transition times esd test total devices sampled resulting classifcation esd-hbm all devices passed 1000v 2 (>2000v) esd-mm all devices passed 400v c (>400v) esd-cdm all devices passed 1000v iv (>1000v) esd ratings C2M1000170D rev. a
7 7 package dimensions package to-247-3 recommended solder pad layout to-247-3 (1) (2) (3) pos inches millimeters min max min max a .190 .205 4.83 5.21 a1 .090 .100 2.29 2.54 a2 .075 .085 1.91 2.16 b .042 .052 1.07 1.33 b1 .075 .095 1.91 2.41 b2 .075 .085 1.91 2.16 b3 .113 .133 2.87 3.38 b4 .113 .123 2.87 3.13 c .022 .027 0.55 0.68 d .819 .831 20.80 21.10 d1 .640 .695 16.25 17.65 d2 .037 .049 0.95 1.25 e .620 .635 15.75 16.13 e1 .516 .557 13.10 14.15 e2 .145 .201 3.68 5.10 e3 .039 .075 1.00 1.90 e4 .487 .529 12.38 13.43 e .214 bsc 5.44 bsc n 3 3 l .780 .800 19.81 20.32 l1 .161 .173 4.10 4.40 ?p .138 .144 3.51 3.65 q .216 .236 5.49 6.00 s .238 .248 6.04 6.30 part number package marking C2M1000170D to-247-3 C2M1000170D this product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited to equipment used in the operation of nuclear facilities, life-support machines, cardiac defbrillators or similar emergency medical equipment, aircraft navigation or communication or control systems, air traffc control systems, or weapons systems. copyright ? 2013 cree, inc. all rights reserved. the information in this document is subject to change without notice. cree and the cree logo are registered trademarks and z-rec and z-fet are trademarks of cree, inc. C2M1000170D rev. a cree, inc. 4600 silicon drive durham, nc 27703 usa tel: +1.919.313.5300 fax: +1.919.313.5451 www.cree.com/power
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